In order to fabricate complementary metal oxide semiconductor (CMOS) integrated circuits, a substrate structure which includes P wells in an N-type substrate, N wells in as a P-type substrate, or regions of both types must be fabricated. This follows from the fact that N-channel field effect transistors must be fabricated in P-type semiconductor material and P-channel field effect transistors must be fabricated in N-type material.
A structure which includes an N well formed in a P-type epitaxial layer on a P+ substrate is shown in FIG. 1. P-type epitaxial layer 2 is formed on the surface of P+ substrate 1 using techniques well known in the art. P type epitaxial layer 2 is approximately 41/2 microns thick. An ideal depth for N well 3 for the fabrication of submicron geometry field effect transistors is approximately 2 microns. In order to fabricate a well having this depth, an implantation of phosphorous or arsenic is made which has a peak implant density at approximately 0.9 microns below the surface of epitaxial layer 2. An implantation to this depth requires an implant energy of approximately 800 kiloelectron volts. Most production type implanters available provide an energy of up to 200 kiloelectron volts. Thus special high energy implanters are necessary to provide an 800 kiloelectron volt implantation energy. Because these special high energy implanters are more expensive than common production type implanters, additional expense is required to establish a production line for the fabrication of the structure of FIG. 1. FIG. 2 is a doping profile of the structure of FIG. 1.